Low-Power Design of Nanometer FPGAs: Architecture and EDA (Systems on Silicon")

Low-Power Design of Nanometer FPGAs: Architecture and EDA (Systems on Silicon")

  • オンデマンド(OD/POD)版です。キャンセルは承れません。
  • 製本 Hardcover:ハードカバー版/ページ数 256 p.
  • 言語 ENG
  • 商品コード 9780123744388
  • DDC分類 621.3

Full Description


Low-Power Design of Nanometer FPGAs Architecture and EDA is an invaluable reference for researchers and practicing engineers concerned with power-efficient, FPGA design. State-of-the-art power reduction techniques for FPGAs will be described and compared. These techniques can be applied at the circuit, architecture, and electronic design automation levels to describe both the dynamic and leakage power sources and enable strategies for codesign.

Contents

Chapter 1Dissipation in Modern FPGAs Chapter 3: Power Estimation in FPGAs Chapter 4: Dynamic Power Reduction Techniques in FPGAs Chapter 5: Leakage Power Reduction in FPGAs Using MTCMOS Techniques Chapter 6: Leakage Power Reduction in FPGAs Through Input Pin Reordering

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