Digital Design using VerilogHDL : VLSI Modeling, Coding and Verification

個数:1
紙書籍版価格
¥40,550
  • 電子書籍
  • ポイントキャンペーン

Digital Design using VerilogHDL : VLSI Modeling, Coding and Verification

  • 著者名:Birla PhD, Shilpi/Singh PhD, B.P./Shukla PhD, Neeraj Kumar
  • 価格 ¥34,214 (本体¥31,104)
  • Morgan Kaufmann(2026/03/26発売)
  • 輝く春を満喫!Kinoppy 電子書籍・電子洋書 全点ポイント25倍キャンペーン(~4/19)
  • ポイント 7,775pt (実際に付与されるポイントはご注文内容確認画面でご確認下さい)
  • 言語:ENG
  • ISBN:9780443290886
  • eISBN:9780443290893

ファイル: /

Description

Digital Design using VerilogHDL: VLSI Modeling, Coding and Verification covers the concepts of digital logic design, including, logic simplification and optimization for digital circuit synthesis and implementation, design and integration of logics (combinational and sequential) in the building of digital circuits and systems, the practical aspects of number systems, the use of VerilogHDL in the logic design, testbench verification, and the synthesis of digital circuits and systems with HDL code examples. Users will find an approach to the design, integration, verification, and synthesizing of a digital logic circuit, complete with coding examples.- Helps users design and integrate HDL circuits and system applications- Covers how to implement VLSI modeling, coding, and testbench verification- Presents readers with what they need to understand the coding of hardware circuits

Table of Contents

Part One: Digital Logic1. Number Systems and their representation2. Logic family3. Combinational Circuits4. Arithmetic Circuits5. Sequential Circuits6. State Machines7. Memory DesignPart Two: VerilogHDL8. Modeling in VerilogHDL9. VerilogHDL Coding and Testbench Verification

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