EDA for IC System Design, Verification, and Testing

個数:1
紙書籍版価格
¥50,371
  • 電子書籍
  • ポイントキャンペーン

EDA for IC System Design, Verification, and Testing

  • 著者名:Scheffer, Louis (EDT)/Lavagno, Luciano (EDT)/Martin, Grant (EDT)
  • 価格 ¥12,105 (本体¥11,005)
  • CRC Press(2018/10/03発売)
  • 春分の日の三連休!Kinoppy 電子書籍・電子洋書 全点ポイント30倍キャンペーン(~3/22)
  • ポイント 3,300pt (実際に付与されるポイントはご注文内容確認画面でご確認下さい)
  • 言語:ENG
  • ISBN:9780849379239
  • eISBN:9781351837590

ファイル: /

Description

Presenting a comprehensive overview of the design automation algorithms, tools, and methodologies used to design integrated circuits, the Electronic Design Automation for Integrated Circuits Handbook is available in two volumes. The first volume, EDA for IC System Design, Verification, and Testing, thoroughly examines system-level design, microarchitectural design, logical verification, and testing. Chapters contributed by leading experts authoritatively discuss processor modeling and design tools, using performance metrics to select microprocessor cores for IC designs, design and verification languages, digital simulation, hardware acceleration and emulation, and much more. Save on the complete set.

Table of Contents

Introduction. The IC Design Process and EDA. Tools and Methodologies for System-Level Design. System-level specification and modeling languages. SoC Block Based Design and IP Assembly. Performance Evaluation Methods for MPSoC Design. Processor Modeling and Design Tools. Embedded Software Modeling and Design. Using Performance Metrics to Select Microprocessor Cores for IC Designs. Parallelizing High-Level Synthesis: A Code Transformational Approach to High-Level Synthesis. Cycle-Accurate System-Level Modeling and Performance Evaluation. Micro-Architectural Power Estimation and Optimization. Design Planning. Design and Verification Languages. Digital Simulation. Using Transactional Level Models in a SoC Design Flow. Assertion-based verification. Hardware Acceleration and Emulation. Formal Property Verification. Design for Test. Automatic Test Pattern Generation. Analog and Mixed-Signal Test.

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