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Description
This book presents a study on how thread and data mapping techniques can be used to improve the performance of multi-core architectures.
It describes how the memory hierarchy introduces non-uniform memory access, and how mapping can be used to reduce the memory access latency in current hardware architectures.
On the software side, this book describes the characteristics present in parallel applications that are used by mapping techniques to improve memory access.
Several state-of-the-art methods are analyzed, and the benefits and drawbacks of each one are identified.
Table of Contents
preface.- chapter 1: introduction.- chapter 2: Sharing-aware mapping and parallel architectures.- chapter 3: Sharing-aware mapping and parallel applications.- chapter 4: Sharing-Aware mapping methods.- chapter 5: Improving performance with Sharing-Aware mapping.- chapter 6: conclusion and research prospects.- index.
