Statistical Performance Analysis and Modeling Techniques for Nanometer VLSI Designs

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  • ポイントキャンペーン

Statistical Performance Analysis and Modeling Techniques for Nanometer VLSI Designs

  • 著者名:Shen, Ruijing/Tan, Sheldon X.-D./Yu, Hao
  • 価格 ¥18,213 (本体¥16,558)
  • Springer(2014/07/08発売)
  • 春分の日の三連休!Kinoppy 電子書籍・電子洋書 全点ポイント30倍キャンペーン(~3/22)
  • ポイント 4,950pt (実際に付与されるポイントはご注文内容確認画面でご確認下さい)
  • 言語:ENG
  • ISBN:9781461407874
  • eISBN:9781461407881

ファイル: /

Description

Since process variation and chip performance uncertainties have become more pronounced as technologies scale down into the nanometer regime, accurate and efficient modeling or characterization of variations from the device to the architecture level have  become imperative for the successful design of VLSI chips.

This book provides readers with tools for variation-aware design methodologies and computer-aided design (CAD) of VLSI systems, in the presence of process variations at the nanometer scale. It presents the latest developments for modeling and analysis, with a focus on statistical interconnect modeling, statistical parasitic extractions, statistical full-chip leakage and dynamic power analysis considering spatial correlations, statistical analysis and modeling for large global interconnects and analog/mixed-signal circuits. 

  • Provides readers with timely, systematic and comprehensive treatments of statistical modeling and analysis of VLSI systems with a focus on interconnects, on-chip power grids and clock networks, and analog/mixed-signal circuits;
  • Helps chip designers understand the potential and limitations of their design tools, improving their design productivity;
  • Presents analysis of each algorithm with practical applications in the context of real circuit design;
  • Includes numerical examples for the quantitative analysis and evaluation of algorithms presented. 

  • Provides readers with timely, systematic and comprehensive treatments of statistical modeling and analysis of VLSI systems with a focus on interconnects, on-chip power grids and clock networks, and analog/mixed-signal circuits;
  • Helps chip designers understand the potential and limitations of their design tools, improving their design productivity;
  • Presents analysis of each algorithm with practical applications in thecontext of real circuit design;
  • Includes numerical examples for the quantitative analysis and evaluation of algorithms presented. 

Table of Contents

Fundamentals of Statistical Analysis.- Statistical Full-Chip Leakage Power Analysis.- Statistical Full-Chip Dynamic Power Analysis.- Statistical Parasitic Extraction.- Statistical Compact Modeling and Reduction of Interconnects.- Statistical Analysis of Global Interconnects.- Statistical Analysis and Modeling for Analog and Mixed-Signal Circuits.

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