Reversible Computation : 7th International Conference, RC 2015, Grenoble, France, July 16-17, 2015, Proceedings (Lecture Notes in Computer Science) / Krivine, Jean (EDT)/ Stefani, Jean-Bernard (EDT)

Reversible Computation : 7th International Conference, RC 2015, Grenoble, France, July 16-17, 2015, Proceedings (Lecture Notes in Computer Science) （2015）

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Reversible Computation : 7th International Conference, RC 2015, Grenoble, France, July 16-17, 2015, Proceedings (Lecture Notes in Computer Science) （2015）

Krivine, Jean (EDT)/ Stefani, Jean-Bernard (EDT)

ウェブストア価格 ¥11,148（本体¥10,135）
Springer International Publishing AG（2015/07発売）
外貨定価 US$ 54.99
ポイント 101pt

オンデマンド(OD/POD)版です。キャンセルは承れません。

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製本 Paperback:紙装版/ペーパーバック版／ページ数 291 p.
言語 ENG
商品コード 9783319208596
DDC分類 005.1015113

Full Description

This book constitutes the refereed proceedings of the 7th International Conference on Reversible Computation, RC 2015, held in Grenoble, France in July 2015. The 19 papers presented together with 1 invited talk were carefully reviewed and selected from 30 submissions. The Conference on Reversible Computation particularly includes the following topics: reversible machines, reversible languages, design and verification of quantum circuits, design of reversible circuits and circuit synthesis.

Invited Paper.- Moment Semantics for Reversible Rule-Based Systems.- Reversible machines.- A Hierarchy of Fast Reversible Turing Machines.- Real-time methods in reversible computation.- Reversible Ordered Restarting Automata.- Reversible Languages.- Garbage Collection for Reversible Functional Languages.- Reverse Code Generation for Parallel Discrete Event Simulation.- Towards a Domain-Specific Language for Reversible Assembly Sequences.- Design and verification of quantum circuits.- Reversibility in Extended Measurement-based Quantum Computation.- A Fully Fault-Tolerant Representation of Quantum Circuits.- Equational reasoning about quantum protocols.- Design of reversible circuits.- Design and Fabrication of a Microprocessor using Adiabatic CMOS and Bennett Clocking.- Improved Algorithms for Debugging Problems on Erroneous Reversible Circuits.- Ricercar: A Language for Describing and Rewriting Reversible Circuits with Ancillae and its Permutation Semantics.- Circuit Synthesis.- Technology Mapping for Single Target Gate based Circuits using Boolean Functional Decomposition.- Towards Code Optimization for Line-aware HDL-based Synthesis of Reversible Circuits.- Synthesis of Quantum Circuits for Dedicated Physical Machine Descriptions.- Short Papers.- Power-Clock Generator Impact on the Performance of NEM-Based Adiabatic Logic Circuits.- A Cost Metric for the Design of Nearest Neighbor Quantum Circuits at the Reversible Logic Level.- Towards modelling of local reversibility.- Application of Functional Decomposition in Synthesis of Reversible Circuits.