Introduction to Logic Synthesis using Verilog HDL (Synthesis Lectures on Digital Circuits & Systems)

Reese, Robert B./ Thornton, Mitchell A.

Springer International Publishing AG（2007/12発売）

• 製本 Paperback:紙装版/ペーパーバック版／ページ数 75 p.
• 言語 ENG
• 商品コード 9783031797422

Full Description

Introduction to Logic Synthesis Using Verilog HDL explains how to write accurate Verilog descriptions of digital systems that can be synthesized into digital system netlists with desirable characteristics.