Design and Test Technology for Dependable Systems-on-Chip (Advances in Computer and Electrical Engineering)

Ubar, Raimund (EDT)

IGI Global（2011/03発売）

• 製本 Hardcover:ハードカバー版／ページ数 350 p.
• 言語 ENG
• 商品コード 9781609602123
• DDC分類 621.3815

Full Description

Covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC). This book provides insight into refined ""classical"" design and test topics and solutions for IC test technology and fault-tolerant systems.

Contents

Built-In Self Repair for Logic Structures Combined Test-Data Compression and Test Planning Diagnostic Modeling of Digital Systems Fault Simulation and Fault Injection Technology Fault-Tolerant and Fail-Safe Design Based on Reconfiguration Flexible Fault-Tolerant Schedules for Embedded Systems Memory Testing and Self-Repair Optimizing Fault Tolerance for Multi-Processor System-on-Chip Software-Based Self-Test of Embedded Microprocessors Transient Faults Detection and Compensation