Hardware Acceleration of EDA AlgorithmsCustom ICs, FPGAs and GPUs.

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Hardware Acceleration of EDA AlgorithmsCustom ICs, FPGAs and GPUs.

Gulati, Kanupriya/ Khatri, Sunil P.

ウェブストア価格 ¥22,764（本体¥20,695）
Springer（2010/04発売）
外貨定価 US$ 109.99
ポイント 206pt

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製本 Hardcover:ハードカバー版／ページ数 194 p.／サイズ 130 illus., 65 in color.
言語 ENG
商品コード 9781441909435
DDC分類 621

基本説明

Deals with the acceleration of EDA algorithms using hardware platforms such as Custom ICs, FPGAs and GPUs. Widely applied CAD algorithms are studied for potential acceleration on these platforms.

Full Description

Single-threaded software applications have ceased to see signi?cant gains in p- formance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technology. This is a signi?cant problem for electronic design automation (EDA) applications, since the design complexity of VLSI integrated circuits (ICs) is continuously growing. In this research monograph, we evaluate custom ICs, ?eld-programmable gate arrays (FPGAs), and graphics processors as platforms for accelerating EDA algorithms, instead of the general-purpose sing- threaded CPU. We study applications which are used in key time-consuming steps of the VLSI design ?ow. Further, these applications also have different degrees of inherent parallelism in them. We study both control-dominated EDA applications and control plus data parallel EDA applications. We accelerate these applications on these different hardware platforms. We also present an automated approach for accelerating certain uniprocessor applications on a graphics processor. This monograph compares custom ICs, FPGAs, and graphics processing units (GPUs) as potential platforms to accelerate EDA algorithms. It also provides details of the programming model used for interfacing with the GPUs.

Alternative Hardware Platforms.- Hardware Platforms.- GPU Architecture and the CUDA Programming Model.- Control Dominated Category.- Accelerating Boolean Satisfiability on a Custom IC.- Accelerating Boolean Satisfiability on an FPGA.- Accelerating Boolean Satisfiability on a Graphics Processing Unit.- Control Plus Data Parallel Applications.- Accelerating statistical static Timing Analysis Using Graphics Processors.- Accelerating Fault Simulation Using Graphics Processors.- Fault Table Generation Using Graphics Processors.- Accelerating Circuit Simulation Using Graphics Processors.- Automated Generation of GPU Code.- Automated Approach for Graphics Processor Based Software Acceleration.- Conclusions.