Embedded Multiprocessors : Scheduling and Synchronization, Second Edition (Signal Processing and Communications) (2ND)

個数:

Embedded Multiprocessors : Scheduling and Synchronization, Second Edition (Signal Processing and Communications) (2ND)

  • 提携先の海外書籍取次会社に在庫がございます。通常3週間で発送いたします。
    重要ご説明事項
    1. 納期遅延や、ご入手不能となる場合が若干ございます。
    2. 複数冊ご注文の場合は、ご注文数量が揃ってからまとめて発送いたします。
    3. 美品のご指定は承りかねます。

    ●3Dセキュア導入とクレジットカードによるお支払いについて
  • 【入荷遅延について】
    世界情勢の影響により、海外からお取り寄せとなる洋書・洋古書の入荷が、表示している標準的な納期よりも遅延する場合がございます。
    おそれいりますが、あらかじめご了承くださいますようお願い申し上げます。
  • ◆画像の表紙や帯等は実物とは異なる場合があります。
  • ◆ウェブストアでの洋書販売価格は、弊社店舗等での販売価格とは異なります。
    また、洋書販売価格は、ご注文確定時点での日本円価格となります。
    ご注文確定後に、同じ洋書の販売価格が変動しても、それは反映されません。
  • 製本 Paperback:紙装版/ペーパーバック版/ページ数 384 p.
  • 言語 ENG
  • 商品コード 9781138114173
  • DDC分類 006.22

Full Description

Techniques for Optimizing Multiprocessor Implementations of Signal Processing Applications

An indispensable component of the information age, signal processing is embedded in a variety of consumer devices, including cell phones and digital television, as well as in communication infrastructure, such as media servers and cellular base stations. Multiple programmable processors, along with custom hardware running in parallel, are needed to achieve the computation throughput required of such applications.

Reviews important research in key areas related to the multiprocessor implementation of multimedia systemsEmbedded Multiprocessors: Scheduling and Synchronization, Second Edition presents architectures and design methodologies for parallel systems in embedded digital signal processing (DSP) applications. It discusses application modeling techniques for multimedia systems, the incorporation of interprocessor communication costs into multiprocessor scheduling decisions, and a modeling methodology (the synchronization graph) for multiprocessor system performance analysis. The book also applies the synchronization graph model to develop hardware and software optimizations that can significantly reduce the interprocessor communication overhead of a given schedule.

Chronicles recent activity dealing with single-chip multiprocessors and dataflow modelsThis edition updates the background material on existing embedded multiprocessors, including single-chip multiprocessors. It also summarizes the new research on dataflow models for signal processing that has been carried out since the publication of the first edition.

Harness the power of multiprocessorsThis book explores the optimization of interprocessor communication and synchronization in embedded multiprocessor systems. It shows you how to design multiprocessor computer systems that are streamlined for multimedia applications.

Contents

Introduction. Application-Specific Multiprocessors. Background Terminology and Notation. DSP-Oriented Dataflow Models of Computation. Multiprocessor Scheduling Models. IPC-Conscious Scheduling Algorithms. The Ordered-Transactions Strategy. Analysis of the Ordered-Transactions Strategy. Extending the OMA Architecture. Synchronization in Self-Timed Systems. Resynchronization. Latency-Constrained Resynchronization. Integrated Synchronization Optimization. Future Research Directions. Bibliography. Index.

最近チェックした商品