A Designer's Guide to Asynchronous VLSI

Beerel, Peter A./ Ozdag, Recep O./ Ferretti, Marcos

Cambridge University Press（2010/02発売）

• 製本 Hardcover:ハードカバー版／ページ数 352 p.
• 言語 ENG
• 商品コード 9780521872447
• DDC分類 621.395

Full Description

Create low power, higher performance circuits with shorter design times using this practical guide to asynchronous design. This practical alternative to conventional synchronous design enables performance close to full-custom designs with design times that approach commercially available ASIC standard cell flows. It includes design trade-offs, specific design examples, and end-of-chapter exercises. Emphasis throughout is placed on practical techniques and real-world applications, making this ideal for circuit design students interested in alternative design styles and system-on-chip circuits, as well as circuit designers in industry who need new solutions to old problems.

Contents

1. Introduction; 2. Channel-based asynchronous design; 3. Modeling channel-based designs; 4. Pipeline performance; 5. Performance analysis and optimization; 6. Deadlock; 7. A taxonomy of design styles; 8. Synthesis-based controller design; 9. Micropipeline design; 10. Syntax-directed translation; 11. QDI pipeline templates; 12. Timed pipeline templates; 13. Single-track pipeline templates; 14. Asynchronous crossbar.