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基本説明
Provides an exciting and challenging laboratory component for an undergraduate digital logic design class. Includes Student Laboratory Tutorials and Projects
using the latest CAD tools and newest FPGA boards from Altera; Covers SoPC design using processor cores and C application programs; and more.
Full Description
New to this edition is an introduction to embedded operating systems for SOPC designs.
Featuring four accelerated tutorials on the Quartus II and Nios II design environments, this edition progresses from introductory programmable logic to full-scale SOPC design integrating hardware implementation, software development, operating system support, state-of-the-art I/O, and IP cores.
This edition features Altera's new 7.1 Quartus II CAD and Nios II SOPC tools and includes projects for Altera's DE1, DE2, UP3, UP2, and UP1 FPGA development boards.
Contents
Tutorial I: The 15 Minute Design.- FPGA Development Board Hardware and I/O Features.- Programmable Logic Technology.- Tutorial II: Sequential Design and Hierarchy.- FPGAcore Library Functions.- Using VHDL for Synthesis of Digital Hardware.- Using Verilog for Synthesis of Digital Hardware.- State Machine Design: The Electric Train Controller.- A Simple Computer Design: The ?P 3.- VGA Video Display Generation using FPGAs.- Interfacing to the PS/2 Keyboard and Mouse.- Legacy Digital I/O Interfacing Standards.- FPGA Robotics Projects.- A RISC Design: Synthesis of the MIPS Processor Core.- Introducing System-on-a-Programmable-Chip.- Tutorial III: Nios II Processor Software Development.- Tutorial IV: Nios II Processor Hardware Design.- Operating System Support for SOPC Design.
