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Description
This book constitutes the refereed proceedings of the 14th International Conference on Verified Software. Theories, Tools and Experiments, VSTTE 2022 held in Trento, Italy, during October 17–18, 2022.
The 9 papers presented in this volume were carefully reviewed and selected from 20 submissions. The papers describe software verification efforts that involve collaboration, theory unification, tool integration, and formalized domain knowledge as well as novel experiments and case studies evaluating verification techniques and technologies.
Table of Contents
Compositional Safety LTL Synthesis.- Leroy and Blazy were right: their memory model soundness proof is automatable.- Shellac: a compiler synthesizer for concurrent programs.- A sequentialization procedure for fault-tolerant protocols.- Towards Practical Partial Order Reduction for High-Level Formalisms.- SMT-based Verification of Persistency Invariants of Px86 Programs.- A Formal Semantics for P-Code.- Separating Separation Logic - Modular Verification of Red-Black Trees.- Residual Runtime Verification via Reachability Analysis.
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