VLSI Design and Test〈1st ed. 2017〉 : 21st International Symposium, VDAT 2017, Roorkee, India, June 29 – July 2, 2017, Revised Selected Papers

著者名：Kaushik, Brajesh Kumar (EDT)/Dasgupta, Sudeb (EDT)/Singh, Virendra (EDT)

Springer（2017/12/21発売）

• 言語：ENG
• ISBN：9789811074691
• eISBN：9789811074707

Description

This book constitutes the refereed proceedings of the 21st International Symposium on VLSI Design and Test, VDAT 2017, held in Roorkee, India, in June/July 2017.
The 48 full papers presented together with 27 short papers were carefully reviewed and selected from 246 submissions. The papers were organized in topical sections named: digital design; analog/mixed signal; VLSI testing; devices and technology; VLSI architectures; emerging technologies and memory; system design; low power design and test; RF circuits; architecture and CAD; and design verification.

Table of Contents

Digital design.- Analog/mixed signal.- VLSI testing.- Devices and technology.- VLSI architectures.- Emerging technologies and memory.- System design.- Low power design and test.- RF circuits.- Architecture and CAD.- Design verification.