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Full Description
High efficiency, large scale, stationary computing systems - supercomputers and data centers - are becoming increasingly important due to the movement of data storage and processing onto remote cloud servers. This book is dedicated to a technology particularly appropriate for this application - superconductive electronics, in particular, rapid single flux quantum circuits. The primary purpose of this book is to introduce and systematize recent developments in superconductive electronics into a cohesive whole to support the further development of large scale computing systems.
A brief background into the physics of superconductivity and the operation of common superconductive devices is provided, followed by an introduction into different superconductive logic families, including the logic gates, interconnect, and bias current distribution. Synchronization, fabrication, and electronic design automation methodologies are presented, reviewing both widely established concepts and techniques as well as recent approaches. Issues related to memory, synchronization, interconnects, coupling noise, bias networks, signal interfaces, and deep scaling of superconductive structures and design for testability are described, and models, expressions, circuits, algorithms, and design methodologies are discussed and placed in context. The aim of this book is to provide insight and engineering intuition into the design of large scale digital superconductive circuits and systems.
Contents
Chapter 1. Introduction.- Chapter 2. Physics and devices of superconductive electronics.- Chapter 3. Superconductive circuits.- Chapter 4. Rapid single flux quantum (RSFQ) circuits.- Chapter 5. Synchronization.- Chapter 6. Superconductive IC manufacturing.- Chapter 7. EDA for superconductive electronics.- Chapter 8. Compact model of superconductor-ferromagnetic transistor.- Chapter 9. Inductive coupling noise in multilayer superconductive ICs.- Chapter 10. Sense amplifier for spin-based cryogenic memory cell.- Chapter 11. Dynamic single flux quantum majority gates.- Chapter 12. Design guidelines for ERSFQ bias networks.- Chapter 13. Partitioning RSFQ Circuits for Current Recycling.- Chapter 14. GALS clocking and shared interconnect for large scale SFQ systems.- Chapter 15. Design for testability of SFQ circuits.- Chapter 16. Conclusions.
