Trustworthy Hardware Design: Combinational Logic Locking Techniques (Analog Circuits and Signal Processing)

Yasin, Muhammad/ Rajendran, Jeyavijayan (JV)/ Sinanoglu, Ozgur

Springer Nature Switzerland AG（2020/09発売）

• 製本 Paperback:紙装版/ペーパーバック版／ページ数 142 p.
• 言語 ENG
• 商品コード 9783030153366

Full Description

With the popularity of hardware security research, several edited monograms have been published, which aim at summarizing the research in a particular field. Typically, each book chapter is a recompilation of one or more research papers, and the focus is on summarizing the state-of-the-art research.
Different from the edited monograms, the chapters in this book are not re-compilations of research papers. The book follows a pedagogical approach. Each chapter has been planned to emphasize the fundamental principles behind the logic locking algorithms and relate concepts to each other using a systematization of knowledge approach. Furthermore, the authors of this book have contributed to this field significantly through numerous fundamental papers.

 

Contents

The Need for Logic Locking.- A Brief History of Logic Locking.- Pre-SAT Logic Locking.- The SAT Attack.- Post-SAT 1: Point function-based Logic Locking.- Approximate Attacks.- Structural Attacks.- Post-SAT 2: Insertion of SAT-unresolvable Structures.- Post-SAT 3: Stripped-Functionality Logic Locking.