- ホーム
- > 洋書
- > 英文書
- > Science / Mathematics
Full Description
Unlike conventional synchronous circuits, asynchronous circuits are not coordinated by a clocking signal, but instead use handshaking protocols to control circuit behaviour. Asynchronous circuits have been found to offer several advantages, including high energy efficiency, flexible timing requirements, high modularity, low noise/EMI, and robustness to PVT variations. At the same time, growing pressures on the electronics industry for ever smaller, more efficient ICs are pushing the limits of conventional circuit technologies. These factors are spurring growing interest in asynchronous circuits amongst both the academic research and commercial R&D communities.
This book introduces a wide range of existing and potential applications for asynchronous circuits, each accompanied with the corresponding circuit design theory, sample circuit implementations, results, and analysis. It serves as an essential guide for academic researchers and students looking to broaden their thinking in advancing asynchronous applications and design methodologies, and provides practical advice to industrial engineers when considering the incorporation of asynchronous circuits in their own applications.
Contents
Chapter 1: Introduction
Chapter 2: Asynchronous circuits for dynamic voltage scaling
Chapter 3: Power-performance balancing of asynchronous circuits
Chapter 4: Asynchronous circuits for ultra-low supply voltages
Chapter 5: Asynchronous circuits for interfacing with analog electronics
Chapter 6: Asynchronous sensing
Chapter 7: Design and test of high-speed asynchronous circuits
Chapter 8: Asynchronous network-on-chips (NoCs) for resource efficient many core architectures
Chapter 9: Asynchronous field-programmable gate arrays (FPGAs)
Chapter 10: Asynchronous circuits for extreme temperatures
Chapter 11: Asynchronous circuits for radiation hardness
Chapter 12: Dual rail asynchronous logic design methodologies for side channel attack mitigation
Chapter 13: Using asynchronous clock distribution networks for timing SFQ circuits
Chapter 14: Uncle - Unified NCL Environment - an NCL design tool
Chapter 15: Formal verification of NCL circuits
Chapter 16: Conclusion