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Full Description
A Comprehensive Guide to Physical Layer Test and Measurement of Digital Communication LinksToday's new data communication and computer interconnection systems run at unprecedented speeds, presenting new challenges not only in the design, but also in troubleshooting, test, and measurement. This book assembles contributions from practitioners at top test and measurement companies, component manufacturers,and universities. It brings together information that has never been broadly accessible before-information that was previously buried in application notes, seminar and conference presentations, short courses, and unpublished works.Readers will gain a thorough understanding of the inner workings of digital high-speed systems, and learn how the different aspects of such systems can be tested. The editors and contributors cover key areas in test and measurement of transmitters (digital waveform and jitter analysis and bit error ratio), receivers (sensitivity, jitter tolerance, and PLL/CDR characterization), and high-speed channel characterization (in time and frequency domain). Extensive illustrations are provided throughout.Coverage includesSignal integrity from a measurement point of viewDigital waveform analysis using high bandwidth real-time and sampling (equivalent time) oscilloscopesBit error ratio measurements for both electrical and optical linksExtensive coverage on the topic of jitter in high-speed networksState-of-the-art optical sampling techniques for analysis of 100 Gbit/s + signalsReceiver characterization: clock recovery, phase locked loops, jitter tolerance and transfer functions, sensitivity testing, and stressed-waveform receiver testingChannel and system characterization: TDR/T and frequency domain-based alternativesTesting and measuring PC architecture communication links: PCIexpress, SATA, and FB DIMM
Contents
Preface xxi About the Authors xxvii Acknowledgments xxxiii Chapter 1 Fundamentals of Digital Communications Systems 1 1.1 Introduction 2 1.2 System Architectures 2 1.3 Line Coding of Digital Signals 121.4 Electrical Signaling 23 1.5 Summary 26 1.6 References 26 Chapter 2 Jitter Basics 29 2.1 Definition of Jitter 292.2 Jitter as a Statistical Phenomenon342.3 Total Jitter and Its Subcomponents 382.4 Analytical Solutions for Jitter Mixtures 42 2.5 The Dual Dirac Model 522.6 Summary 582.7 References 59 Chapter 3 Serial Communication Systems and Modulation Codes 61 3.1 Introduction 62 3.2 Encoders and Modulation Code Examples 68 3.3 Telephone System History and Evolution 89 3.4 SONET Design Requirements 1073.5 Measuring the Band-Pass Response 1123.6 Jitter 1143.7 Measuring Power Supply Noise Immunity 120 3.8 Power Supply Distribution, Grounding, and Shielding 1233.9 Measuring SONET Jitter 1243.10 Modulation Codes for the Last Mile 1403.11 Gigabit Ethernet 1493.12 Summary 163 3.13 References 164Chapter 4 Bit Error Ratio Testing 169 4.1 Basics of Bit Error Ratio Testing 170 4.2 Bit Error Ratio Statistics 178 4.3 Advanced BER Measurement Topics 192 4.4 Summary 193 4.5 References 193Chapter 5 BERT Scan Measurements 195 5.1 Basics of BERT Scan Measurements 195 5.2 Sample Delay Scan 200 5.3 Sample Threshold Scan 226 5.4 Full Eye Scan 228 5.5 Spectral Jitter Decomposition 238 5.6 Summary 2415.7 References 242 Chapter 6 Waveform Analysis--Real-Time Scopes 243 6.1 Principles of Operation of Real-Time Digital Oscilloscopes 2456.2 Eye Diagram Analysis on Real-Time Instruments 2586.3 Methods of Analyzing Individual Jitter Components 279 6.4 Analysis of Composite Jitter 299 6.5 Measurement Procedures 3026.6 Interpreting Jitter Measurement Results 315 6.7 Summary 325 6.8 References 327 Chapter 7 Characterizing High-Speed Digital Communications Signals and Systems with the Equivalent-Time Sampling Oscilloscope 329 7.1 Sampling Oscilloscope Basics 330 7.2 Triggering the Oscilloscope 330 7.3 Oscilloscope Bandwidth and Sample Rate 3317.4 Waveform Acquisition Process for the Sampling Oscilloscope 3357.5 Sources of Instrumentation Noise 346 7.6 Parametric Analysis of Waveforms 350 7.7 The Effect of Oscilloscope Bandwidth on Waveform Results 3537.8 Measurements of the Eye Diagram 3587.9 Return-to-Zero Signals 3827.10 Advanced Jitter Analysis 3877.11 Summary 4177.12 References 418 Chapter 8 High-Speed Waveform Analysis Using All-Optical Sampling 421 8.1 Introduction 422 8.2 Principles of Optical Sampling 427 8.3 Performance Measures of All-Optical Sampling Systems 4418.4 Timebase Designs 464 8.5 Experimental Implementation and Key Building Blocks 475 8.6 Related Applications and Possible Future Directions 4928.7 Summary 4988.8 References 499Chapter 9 Clock Synthesis, Phase Locked Loops, and Clock Recovery 505 9.1 Oscillators and Phase Noise 506 9.2 Phase Locked Loops and Clock Synthesis 510 9.3 Clock Data Recovery Circuits 512 9.4 PLL and Clock Recovery Dynamic Behavior 517 9.5 Measuring PLL Dynamics 523 9.6 Measuring Phase Noise and Jitter Spectrum 525 9.7 Summary 531 9.8 References 532 Chapter 10 Jitter Tolerance Testing 533 10.1 Introduction 533 10.2 Jitter Tolerance: Basic Measurement Method and Test Setup 536 10.3 Generation of Jitter Tolerance Test Signals 539 10.4 Jitter Tolerance Measurement Method and Test Setup 55510.5 Summary 560 10.6 References 560 Chapter 11 Sensitivity Testing in Optical Digital Communications 563 11.1 Introduction: Optical Digital Receivers 564 11.2 The Basics of Optical Sensitivity Measurements 565 11.3 BER Calculations in Real Communications Systems 58811.4 Summary 602 11.5 References 603Chapter 12 Stress Tests in High-Speed Serial Links 605 12.1 The Need for High-Speed Serial Communication 606 12.2 Early High-Speed Optical Stressed-Eye Tests 60712.3 BER versus OSNR 609 12.4 10 Gigabit Ethernet: IEEE 802.3ae 618 12.5 The Advent of Electronic Dispersion Compensation 629 12.6 LRM Stress Testing (IEEE 802.3aq) 634 12.7 Future Standards 641 12.8 Summary 65412.9 References 655 Chapter 13 Measurements on Interconnects 657 13.1 Measurements and Characterization of Interconnects 65813.2 Modeling of System Performance from Measurements 689 13.3 Summary 70913.4 References 710 Chapter 14 Frequency Domain Measurements 713 14.1 Introduction 714 14.2 Understanding Network Analyzer Hardware 716 14.3 Understanding S-Parameters 729 14.4 Error Correction and Calibration Methods 74014.5 Graphical Representations 74914.6 Example Devices 75814.7 Summary 783 14.8 References 783 Chapter 15 Jitter and Signaling Testing for Chip-to-Chip Link Components and Systems 785 15.1 Introduction 785 15.2 Multiple Gigabit per Second Computer Chip-to-Chip I/O Link Architectures 78815.3 Chip-to-Chip Link System BER and Signaling Tests 80015.4 Testing Examples 81115.5 Future Technology Trends for High-Speed Links 81515.6 Summary 81715.7 References 817 Appendix A Pseudo-Random Binary Sequences 819 Appendix B Passive Elements for Test Setups 835 Appendix C Coaxial Cables and Connectors 847 Appendix D Supplemental Materials for Chapter 3 861 Index 911
